Joshua.Mora@AMD.com, WW HPC Agenda Heterogeneous HW flexibility on SW request. PRACE 2011 prototype, 1TF/kW efficiency ratio. Performance debugging of HW and SW on multi-socket, multi-chipset, multi-GPUs, multi-rail (IB). Affinity/binding. In background: [c/nc] HT topologies, I/O performance implications, performance counters, NIC/GPU thingumabob interaction with processors, SW stacks.
12/7/2011 pre-Exascale HPC systems Saudi Arabian HPC Symposium, Al-Khobar
If (HPC==customization) {Heterogeneous HW/SW flexibility;} else {Enterprise solutions;}
On the HW side, customization is each(prenominal) about Multi-socket systems, to provide cpu computing density (ie. aggregate G[FLOP/Byte]/s), and memory capacity. Multi-chipset systems, to hook multiple GPUs (to accelerate computation) and NICs (tightly coupled processors/gpus crossways computing lymph glands). But Pay attention, among other things, to [nc/c]HT topologies to avoid racetrack out of bandwidth (ie. resource limitations) between devices when the HPC application starts pushing to the limits in all directions.
12/7/2011 pre-Exascale HPC systems
Saudi Arabian HPC Symposium, Al-Khobar
typesetters case: break up NFS (RNANETWORKS) over 4 QDR IB cards
FAT NODE in 4U 8xSix-core @ 2.

6GH 256GB RAM @ DDR2-667 4xPCIegen2 4xQDR IB , 2x IB miens RNAcache appliance
8x10GB/s 6GB/s bidir QDR IB switch 36 ports revolutionary fast local/swap/shared cluster show system Reads/Writes @ 20GB/sec aggregated
CLUSTER NODE 01 in 1U 2xSix-core @ 2.6GHz 16GB RAM @ DDR2-800 1xPCIegen2 1xQDR IB, 1 IB port 2x10GB/s RNAcache client 6GB/s bidir
6GB/s bidir CLUSTER NODE 08 in 1U 2xSix-core @ 2.6GHz 16GB RAM @ DDR2-800 1xPCIegen2 1xQDR IB, 1 IB port RNAcache client 2x10GB/s 6GB/s bidir
3
6GB/s bidir
6GB/s bidir
12/7/2011 pre-Exascale HPC systems
Saudi Arabian HPC Symposium, Al-Khobar
Example: OpenMP application on NUMA system
Better to configure system as memory node not...If you want to get a full essay, order it on our website: Orderessay
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